1. Field of the Invention
The present invention relates to methods and devices for transferring thin wafers during semiconductor wafer processing.
2. Description of Related Art
Integrated circuits, power semiconductors, light-emitting diodes, photonic circuits, microelectromechanical systems (MEMS), embedded passive arrays, packaging interposers, and a host of other silicon- and compound semiconductor-based microdevices are produced collectively in arrays on wafer substrates ranging from 1 to more than 12 inches in diameter. The devices are then separated into individual devices or dies that are packaged to allow practical interfacing with the macroscopic environment, for example, by interconnection with a printed wiring board. Constructing the device package on or around the die while it is still part of the wafer array has become increasingly popular. This practice, which is referred to as wafer-level packaging, reduces overall packaging costs and allows a higher interconnection density to be achieved between the device and its microelectronic environment than with more traditional packages that usually have outside dimensions several times larger than the actual device.
Until recently, interconnection schemes have generally been confined to two dimensions, meaning the electrical connections between the device and the corresponding board or packaging surface to which it is mounted have all been placed in a horizontal, or x-y, plane. The microelectronics industry has now recognized that significant increases in device interconnection density and corresponding reductions in signal delay (as a result of shortening the distance between electrical connection points) can be achieved by stacking and interconnecting devices vertically, that is, in the z-direction. Two common requirements for device stacking are (1) thinning of the device wafer in the through-wafer direction from the backside; and (2) subsequently forming through-wafer electrical connections, commonly referred to as through-silicon vias, or TSVs, that terminate on the backside of the device. Semiconductor device thinning has now become a standard practice even when devices are not packaged in a stacked configuration because such thinning facilitates heat dissipation and allows a much smaller form factor to be achieved with compact electronic products such as mobile phones.
There is growing interest in thinning semiconductor devices to thicknesses of less than 100 microns to reduce their profiles, especially when they or the corresponding packages in which they reside are stacked, and to simplify the formation of backside electrical connections on the devices. Silicon wafers used in high-volume integrated circuit production are typically 200 or 300 mm in diameter and have a through-wafer thickness of about 750 μm. Without thinning, it would be nearly impossible to form backside electrical contacts that connect with front-side circuitry by passing the connections through the wafer. Highly efficient thinning processes for semiconductor-grade silicon and compound semiconductors based on mechanical grinding (backgrinding) and polishing as well as chemical etching are now in commercial use. These processes allow the device wafer thickness to be reduced to less than 100 μm in a few minutes while maintaining precise control over cross-wafer thickness uniformity.
Device wafers that have been thinned to thicknesses of less than 100 μm, and especially those devices thinned to less than 60 μm, are extremely fragile and must be supported over their full dimensions to prevent cracking and breakage. An increasingly popular approach to ultrathin wafer handling involves mounting the full-thickness device wafer device-side-down to a rigid carrier with a polymeric adhesive, and the device wafer then is thinned and processed from the backside. The fully processed, ultrathin wafer is then removed, or debonded, from the carrier by thermal, thermomechanical, mechanical, or chemical processes after the backside processing has been completed.
After debonding the device or processed wafer from its carrier, especially by thermomechanical debonding, the device wafer must then be transferred to other tools for subsequent processing, such as lamination to a film frame. Multiple problems can arise during transfer, such as breakage, wafer bow, warping, and scratching. Additionally, the device wafer needs to be reliably centered on the transfer tool in order to ensure that it is placed repeatably for the next process.
Gel-Pak® brand transfer tools are a well-known method of handling device wafers. However, this method of handling requires manual removal of the device wafer before the next process as well as manual centering. Over time, a Gel-Pak® transfer tool may become dirty and is unable to be cleaned. This can cause uneven pressure and adhesion on the device and can cause breakage. Gel-Pak® tools are also tacky, which makes the removal of the device difficult. Additionally, Gel-Pak® tools can be damaged by the heat generated by thermomechanical debonding processes.